
82
32117DS–AVR-01/12
AT32UC3C
Note:
1. These values are based on simulation and characterization of other AVR microcontrollers manufactured in the same pro-
cess technology. These values are not covered by test limits in production.
Note:
1. These values are based on simulation and characterization of other AVR microcontrollers manufactured in the same pro-
cess technology. These values are not covered by test limits in production.
2. hold length = total cycle duration - setup duration - pulse duration. “hold length” is for “ncs wr hold length” or “nwe hold
length”
Table 7-54.
SMC Read Signals with no Hold Settings
(1)Symbol
Parameter
Conditions
Min
Units
NRD Controlled (READ_MODE = 1)
SMC
19
Data setup before NRD high
V
VDD = 3.0V,
drive strength of the pads set to the lowest,
external capacitor = 40pF
32.5
ns
SMC20
Data hold after NRD high
0
NRD Controlled (READ_MODE = 0)
SMC
21
Data setup before NCS high
V
VDD = 3.0V,
drive strength of the pads set to the lowest,
external capacitor = 40pF
28.5
ns
SMC22
Data hold after NCS high
0
Table 7-55.
Symbol
Parameter
Conditions
Min
Units
NRD Controlled (READ_MODE = 1)
SMC23
Data Out valid before NWE high
V
VDD = 3.0V,
drive strength of the pads set
to the lowest,
external capacitor = 40pF
(nwe pulse length - 1) * tCPSMC - 1.4
ns
SMC
24
Data Out valid after NWE high
(2)nwe pulse length * tCPSMC - 4.7
SMC25
nwe pulse length * tCPSMC - 2.7
SMC
29
nwe pulse length * tCPSMC - 0.7
SMC
31
NWE high to A2 - A25 cha
nge(2)nwe pulse length * tCPSMC - 6.8
SMC
32
NWE high to NCS inactive
(2)(nwe hold pulse - ncs wr hold length) *
tCPSMC - 2.5
SMC
33
NWE pulse width
nwe pulse length * tCPSMC - 0.2
NRD Controlled (READ_MODE = 0)
SMC
34
Data Out valid before NCS high
VVDD = 3.0V,
drive strength of the pads set
to the lowest,
external capacitor = 40pF
(ncs wr pulse length - 1) * tCPSMC - 2.2
ns
SMC
35
Data Out valid after NCS high
(2)ncs wr hold length * tCPSMC - 5.1
SMC
36
NCS high to NWE inactive
(2)(ncs wr hold length - nwe hold length) *
tCPSMC - 2